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Zeno Semiconductor

Zeno | Scaling Beyond Moore's Law

Who is Zeno Semiconductor?

The memory and logic technologies are manufacturable on mainstream CMOS and FinFET fabrication processes, with no new materials or equipments, with no changes to any of the existing libraries and IPs. Zeno 1-transistor Bi-SRAM (bi-stable, BiCMOS) provides a static memory cell with 5x smaller cell size. Zeno βoosted transistor technology results in 4x gain in power-performance product within the same technology node. Serial entrepreneurs with over 30 years of experience. Or-Bach is the founder of Chip Express, eASIC, and MonolithIC 3D Inc. Lai is the co-inventor of EPROM tunnel oxide (ETOX) flas memory cell, which has become the industry standard. Paul is the President and GM of Silicon Storage Technology (SST) China. Yoshio Nishi is a professor at Stanford University since May 2002.

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Products & services of Zeno Semiconductor

Product Zeno Demonstrates Scalability of World’s Smallest SRAM Bitcell Technology to FinFET Technology Node  image
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Zeno Demonstrates Scalability of World’s Smallest SRAM Bitcell Technology to FinFET Technology Node

1- /2-Transistor SRAM Technology Demonstrated at Standard FinFET Process Technology Sunnyvale, CA, December 5, 2018 – Zeno Semiconductor, a Silicon Catalyst Portfolio Company, demonstrated the scalability of its novel 1-transistor/2-transistor Bi-SRAM (bi-stable, intrinsic bipolar) memory technology to FinFET technology node at the IEDM Conference. The results from 14nm and 16nm FinFET technology nodes from multiple foundries follow previous implementation of Bi-SRAM technology in 28nm technolo

Product 1-Transistor SRAM Cell Scales to FinFET Technology Node image
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1-Transistor SRAM Cell Scales to FinFET Technology Node

Zeno’s 1-transistor Bi-SRAM uses a single transistor and is ~5x smaller than a conventional SRAM -- which use 6-transistor bitcells (6T-SRAM) -- at the same technology node.​ One way to look at a System-on-Chip (SoC) is the proportions of silicon area that are devoted to new logic, reused logic (from an earlier design), and embedded memory. According to Semico Research, in 1999, the area devoted to memory averaged out at 17%. By 2018, embedded memory has become pervasive -- designers demand more

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